dsPIC33EV256GM106-I/MR Microchip, 16bit Digital Signal Processor 70MIPS 256 kB Flash 64-Pin QFN
- RS Stock No.:
- 861-0557P
- Mfr. Part No.:
- dsPIC33EV256GM106-I/MR
- Manufacturer:
- Microchip
Price Each (Supplied in a Tube)**
€2.62
(exc. VAT)
€3.22
(inc. VAT)
999999 In stock for delivery within 1 working days*
* Delivery dates may change based on your chosen quantity and delivery address.
Units | Per unit |
---|---|
1 + | €2.62 |
**price indicative
- RS Stock No.:
- 861-0557P
- Mfr. Part No.:
- dsPIC33EV256GM106-I/MR
- Manufacturer:
- Microchip
dsPIC33EVxxxGM00x/10x 16-Bit Digital Signal Controllers
Microchips dsPIC33EV family of 16-bit Digital Signal Controllers (DSCs) features a 70 MIPS dsPIC® DSC core with enhanced on-chip features. Capable of operating in harsh environments these devices are suitable for appliance and automotive applications. Rich peripheral integration includes SENT (Single-Edge Nibble Transmission-Transmit/Receive), High Speed PWMs, OP Amps and Error Correcting Code Flash for increased reliability and safety. The performance offered by the dsPIC33EV family of MCUs allows them to be incorporated into the design of high-performance, precision motor control systems that are more energy efficient. They can be used to control BLDC, permanent magnet synchronous, AC induction and stepper motors.
Microcontroller Features
70 MHz Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
16-Bit Wide Data Path
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle, Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Intermediate Security for Memory - Provides a Boot Flash Segment in addition to the existing General Flash Segment
Error Code Correction (ECC) for Flash
Added Two Alternate Register Sets for Fast Context Switching
Code-Efficient (C and Assembly) Architecture
16-Bit Wide Data Path
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle, Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Intermediate Security for Memory - Provides a Boot Flash Segment in addition to the existing General Flash Segment
Error Code Correction (ECC) for Flash
Added Two Alternate Register Sets for Fast Context Switching
Clock Management Features
Internal, 15% Low-Power RC (LPRC) – 32 kHz
Internal, 1% Fast RC (FRC) – 7.37 MHz
Internal, 10% Backup RC (BFRC) – 7.37 MHz
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Additional Fail-Safe Clock Monitor Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock
Independent Watchdog Timer (WDT)
System Windowed Watchdog Timer (DMT)
Fast Wake-Up and Start-Up
Internal, 1% Fast RC (FRC) – 7.37 MHz
Internal, 10% Backup RC (BFRC) – 7.37 MHz
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Additional Fail-Safe Clock Monitor Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock
Independent Watchdog Timer (WDT)
System Windowed Watchdog Timer (DMT)
Fast Wake-Up and Start-Up
Power Management Features
Low-Power Management modes (Sleep, Idle and Doze)
Power Consumption Minimized Executing NOP String
Integrated Power-on Reset (POR) and Brown-out Reset (BOR)
0.5 mA/MHz Dynamic Current (typical)
50 μA at +25°C IPD Current (typical)
Power Consumption Minimized Executing NOP String
Integrated Power-on Reset (POR) and Brown-out Reset (BOR)
0.5 mA/MHz Dynamic Current (typical)
50 μA at +25°C IPD Current (typical)
Peripheral Features
Up to Six Pulse-Width Modulation (PWM) Outputs (three generators)
Configurable Analogue to Digital Converter (ADC) Module
Up to 4 Operational Amplifiers
Up to 5 Comparators
Charge Time Measurement Unit (CTMU) - Supports mTouch™ capacitive touch sensing
Five 16-bit Timers
Two 32-bit Timers
Four Output Capture modules Configurable as Timers/Counters
Four Input Capture modules
Two Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
Two SPI Modules
One I2C Module with SMBus Support
Configurable Analogue to Digital Converter (ADC) Module
Up to 4 Operational Amplifiers
Up to 5 Comparators
Charge Time Measurement Unit (CTMU) - Supports mTouch™ capacitive touch sensing
Five 16-bit Timers
Two 32-bit Timers
Four Output Capture modules Configurable as Timers/Counters
Four Input Capture modules
Two Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
Two SPI Modules
One I2C Module with SMBus Support
Attribute | Value |
---|---|
Maximum Frequency | 70MIPS |
Device Million Instructions per Second | 70MIPS |
Data Bus Width | 16bit |
RAM Size | 16 kB |
Instruction Set Architecture | Code Efficient |
Program Memory Size | 256 kB |
Program Memory Type | Flash |
Mounting Type | Surface Mount |
Package Type | QFN |
Pin Count | 64 |
Typical Operating Supply Voltage | 4.5 to 5.5 V |
Number of UART Channels | 2 |
Number of LIN Channels | 0 |
PWM Channels | 6 |
ADC Resolution | 10 bit, 12bit |
Minimum Operating Temperature | -40 °C |
PWM Resolution | 16bit |
Number of CAN Channels | 1 |
ADC Channels | 36 |
Number of ADC Units | 1 |
Maximum Operating Temperature | +85 °C |
Number of PWM Units | 1 |
Length | 9mm |
ADCs | 1 (36 x 10/12 bit) |
Height | 0.95mm |
Timer Resolution | 16 bit, 32bit |
Number of I2C Channels | 1 |
Number of Timers | 7 |
Number of PCI Channels | 0 |
Number of Ethernet Channels | 0 |
USB Channels | 0 |
Number of SPI Channels | 2 |
Pulse Width Modulation | 1 (6 x 16 bit) |
Dimensions | 9 x 9 x 0.95mm |
Timers | 2 x 32 bit, 5 x 16 bit |
Width | 9mm |
Number of USART Channels | 0 |