Toshiba 8-Bit Octal D Type Latch, Transparent, 20-Pin TSSOP
- RS Stock No.:
- 171-3409P
- Mfr. Part No.:
- 74VHC573FT
- Manufacturer:
- Toshiba
Subtotal 25 units (supplied on a continuous strip)*
€8.50
(exc. VAT)
€10.50
(inc. VAT)
In Stock
- Plus 2,100 unit(s) shipping from 08 June 2026
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
|---|---|
| 25 + | €0.34 |
*price indicative
- RS Stock No.:
- 171-3409P
- Mfr. Part No.:
- 74VHC573FT
- Manufacturer:
- Toshiba
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Toshiba | |
| Logic Family | 74VHC | |
| Product Type | Octal D Type Latch | |
| Logic Function | D Type | |
| Latch Mode | Transparent | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Polarity | Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | TSSOP | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Length | 6.5mm | |
| Series | 74VHC | |
| Height | 1mm | |
| Standards/Approvals | No | |
| Automotive Standard | AEC-Q100 | |
| Select all | ||
|---|---|---|
Brand Toshiba | ||
Logic Family 74VHC | ||
Product Type Octal D Type Latch | ||
Logic Function D Type | ||
Latch Mode Transparent | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Polarity Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type TSSOP | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Length 6.5mm | ||
Series 74VHC | ||
Height 1mm | ||
Standards/Approvals No | ||
Automotive Standard AEC-Q100 | ||
The 74VHC573FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages
Wide operating temperature range: Topr = -40 to 125
High speed: fMAX = 180 MHz (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
Low noise: VOLP = 1.0 V (max)
Pin and function compatible with the 74 series
(74AC/HC/AHC/LV etc.) 573 type.
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